Course Program:
This is an intemediate level to advanced level course on accelerated computing with Field Programming Gate Arrays (FPGAs). Its center is high level synthesis which enables accelerator design with an object oriented language such as C++. We will be using tools from Xilinx, which is one of the major vendors in FPGA business. By the end of the semester, each student will have completed the implementation of a hardware accelerator such as algorithmic trading, deep learning, cryptographic operations, Bitcoin mining or other perfomance-requiring algorithm. In this course we will study on the following topics:
- FPGAs: What are they? When should we use them? The rise of FPGAs in high performance computing
- Reconfigurable Architecture: Configurable Operation Blocks, Configurable Interconnects, Configurable Memory Components, Configurable I/O. Configuration granularity.
- High-level Synthesis (HLS) Basics: Input, Output, Data flow, Control flow, Scheduling, Resource Allocation. Design Space Exploration. Objectives. Constraints. Debug. Functional testing. Co-Simulation.
- HLS at work - Data Types: Fixed point data types. Data structures.
- HLS at work - Loops: Pipelining, Parallelism, Loop optimizations.
- Dataflow Computing: Algorithmic transformations. Designing for throughput.
- HLS at work - Arrays and Interfaces: Array to memory mapping. Conditional and unconditional I/O. Stream I/O.
- System Integration – HW/SW interfaces. IP generation. Partial Reconfiguration.
- Recent challenges in Reconfigurable Computing
Textbook:
Reference Books:
Zynq Book: http://www.zynqbook.com/
Vivado HLS User Guide: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug902-vivado-high-level-synthesis.pdf
Grading:
- Active attendance: 10 pts.
- Three assignments: 45 pts (15 pts each) (for each submission, late is penalized by 20% per day)
- Project: 45 pts (for each of the following item, late is penalized by 100% per minute)
- Project idea presentation: 5 pts (due date: May 3rd (lecture time))
- Project Interim presentation+demo: 15 pts (due date: June 7th (lecture time))
- Final presentation+demo: 15 pts (due date: Final date and time)
- Project Report + Code Submission: 10 pts (due date: July 6th @ 23:59)
Notes:
- Academic honesty is required. Cheating (both ways), plagiarism (including mosaic plagiarism), taking materials from internet or from friends and unfair use are fully forbidden.
- Active attendance requires the student to be physically present in the class, present his/her work, ask and answer inspiring questions
- Homeworks can be in the form of coding, simulation, analysis.
- Project topic will be proposed by the student. The student needs to work with the instructor prior to deciding on the project topic.