Selected Publications

E. Bilgili and A. Yurdakul, “Common Subexpression-based Compression and Multiplication of Sparse Constant Matrices”, IEEE Embedded Systems Letters, Early Access: September 2023. access on arXiv.

İ. Sıkdokur, İ. M. Baytaş and A. Yurdakul, “EdgeConvEns: Convolutional Ensemble Learning for Edge Intelligence,” access on arXiv.

M. Ş. Önen and A. Yurdakul, “Container Scheduling Under ARINC 653 Scheduler Constraints,” 26th Euromicro Conference on Digital System Design (DSD’23), September 6-8, 2023, Durres, Albania.

C. Onur and A. Yurdakul, “ElectAnon: A Blockchain-Based, Anonymous, Robust and Scalable Ranked-Choice Voting Protocol”, ACM Transactions on Distributed Ledger Technologies: Research and Practice, May 2023. access on arXiv.

C. Çağlayan and A. Yurdakul, “A Clustering-Based Scoring Mechanism for Malicious Model Detection in Federated Learning,” 25th Euromicro Conference on Digital System Design (DSD’22), August 31 - September 2, 2022, Gran Canaria, Spain.

U. C. Özyar and A. Yurdakul, “A Decentralized Framework with Dynamic and Event-Driven Container Orchestration at the Edge,” 15th IEEE International Conference on Internet of Things (iThings’22), Aug. 22-25, 2022, Espoo Finland.

M. A. Şarkışla and A. Yurdakul, “SIMDify: Framework for SIMD-Processing with RISC-V Scalar Instruction Set,” 19th Australasian Symposium on Parallel and Distributed Computing (AusPDC’21), 1 - 5 February 2021, online.

Ö. F. Irmak and A. Yurdakul, “An Embedded RISC-V Core with Fast Modular Multiplication”, arXiv:2009.14685, 2020.

İ. Sıkdokur, İ. M. Baytaş and A. Yurdakul, “Image Classification on Accelerated Neural Networks,” 6th Turkish High Performance Computing Conference, BAŞARIM’20, Oct. 8-9, 2020, Ankara, Turkey.

N. Hilal and A. Yurdakul, "Model-based Design of a Roadside Unit for Emergency and Disaster Management,” 3rd International Workshop on Intelligent Transportation and Connected Vehicles Technologies (ITCVT 2020), April 20, 2020, Budapest, Hungary

K. R Özyılmaz and A. Yurdakul, "IoT Blockchain Integration: A Security Perspective,” in Security Analytics for Internet of Everything, CRC Press, Taylor & Francis Group, USA, February 2020.

İ. Taştan, M. Karaca and A. Yurdakul, “Approximate CPU Design for IoT End-Devices with Learning Capabilities,” in Special Issue Low-Power Techniques for Embedded Systems and Network-on-Chip Architectures, Electronics, vol 9., issue. 1, article no: 125, January 2020.

K. R. Özyılmaz and A. Yurdakul, “Designing a blockchain-based IoT infrastructure with Ethereum, Swarm and LoRa: The Software Solution to Create High-Availability with Security Minimal Risks,” IEEE Consumer Electronics Magazine, vol. 8, pp. 28-34, March 2019.

K. R. Özyılmaz, M. Doğan and A. Yurdakul, “IDMoB: IoT Data Marketplace on Blockchain,” Crypto Valley Conference on Blockchain Technology (CVCBT’18), June 20-23, 2018, Zug, Switzerland.

A. V. Nurdağ, B. Arnrich and A. Yurdakul, “WiP: Daily Life Oriented Indoor Localization By Fusion Of Smartphone Sensors And Wi-Fi,” 4th IEEE International Conference on Smart Computing (SMARTCOMP’18), June 18-20, 2018, Taormina, Italy.

M. Tükel, A. Yurdakul and B. Örs, “Customizable embedded processor array for multimedia applications,” Integration-The VLSI Journal, pp. 213-223, January 2018.

K. R. Özyılmaz and A. Yurdakul, “WiP: Integrating Low-Power IoT devices to a Blockchain-Based Infrastructure,” International Conference on Embedded Software (EMSOFT’17), Oct. 15-20, 2017, Seoul, South Korea.

A. Yurdakul, “WiP: From SQL to Database Processors: A Retargetable Query Planner,” Forum on Specification & Design Languages (FDL’17), Sept 18-20, 2017, Verona, Italy.

B. Salami, G. A. Malazgirt, O. Arcas-Abella, A. Yurdakul and N. Sönmez, “AxleDB: A novel programmable query processing platform on FPGA," Microprocessors and Microsystems: Embedded Hardware Design, vol. 51, pp. 142-164, June 2017.

G. A. Malazgirt and A. Yurdakul, “Prenaut: Design space exploration for embedded symmetric multiprocessing with various on-chip architectures,” Journal of Systems Architecture: Embedded Software Design, vol. 72, pp. 3-18, January 2017.

M. Schmid, C. Schmitt, F. Hannig, G. A. Malazgirt, N. Sonmez, A. Yurdakul and A. Cristal, “Big Data and HPC Acceleration with Vivado HLS,” in FPGAs for Software Programmers, 2016, Springer, ISBN: 978-3-319-26406-6

S. Bayar and A. Yurdakul, “An Efficient Mapping Algorithm on 2-D Mesh Network-on-Chip with Reconfigurable Switches,” 11th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS’16), April 12-14, 2016, İstanbul, Turkey.

N. Aras and A. Yurdakul, “A New Multi-objective Mathematical Model for the High-level Synthesis of Integrated Circuits,” Applied Mathematical Modelling, Volume 40, Issue 3, pp. 2274-2290, 1 February 2016.

G. A. Malazgirt, D. Candaş and A. Yurdakul, “Taxim: A Toolchain for Automated and Configurable Simulation for Embedded Multiprocessor Design,” 4th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES’16), Jan 18, 2016, Prag, Czech Republic.

G. A. Malazgirt, A. Yurdakul and S. Niar, “Customizing VLIW Processors from Dynamically Profiled Execution Traces,” Microprocessors and Microsystems: Embedded Hardware Design, vol. 39, no. 8, pp. 656–673, November 2015.

S. Bayar and A. Yurdakul, “PFMAP: Exploitation of Particle Filters for Network-on-chip Mapping,” IEEE Transactions on VLSI Design, vol. 23, no. 10, pp. 2116 - 2127, October 2015.

G. A. Malazgirt, B. Kıyan, D. Candaş, K. Erdayandı and A. Yurdakul, “Exploring Embedded Symmetric Multiprocessing with Various On-chip Architectures,” 13th International Conference on Embedded and Ubiquitous Computing (EUC’15), October 21-23, 2015, Porto, Portugal.

G. A. Malazgirt, N. Sönmez, A. Yurdakul, O. Unsal and A. Cristal, “High Level Synthesis Based Hardware Accelator Design for Processing SQL Queries,” 12th FPGA World Conference (FPGAWORLD’15), September 8-10, 2015, Stockholm-Copenhag, Sweden-Denmark.

G. A. Malazgirt, N. Sönmez, A. Yurdakul, O. Unsal and A. Cristal, “Accelerating Complete Decision Support Queries Through High-Level Synthesis Technology,” 23rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA’15), February 22-25, 2015, Monterey, California, USA.

S. Niar, A. Yurdakul, O. Unsal, T. Tugcu and A. Yuceturk, “A Dynamically Reconfigurable Architecture for Emergency and Disaster Management in ITS,” 3rd International Conference on Connected Vehicles and Expo (ICCVE’14), Nov 3-7, 2014, Vienna, Austria.

G. A. Malazgirt, H.E. Yantır, A. Yurdakul and S. Niar, “Application Specific Multi-port Memory Customization in FPGAs," 24th International Conference on Field Programmable Logic and Applications (FPL’14), September 2 - 4, 2014, Munich, Germany.

G. A. Malazgirt, A. Yurdakul and S. Niar, “WiP: MIPT: Rapid Exploration and Evaluation for Migrating Sequential Algorithms to Multiprocessing," 12th International Conference on High Performance Computing & Simulation (HPCS’14), July 21 - 25, 2014, Bologna, Italy.

H. E. Yantır and A. Yurdakul, “An Efficient Heterogeneous Register File Implementation for FPGAs," IEEE 21st Reconfigurable Architectures Workshop (RAW’14), 19-20 May 2014, Phoenix, USA.

H. E. Yantır, S. Bayar and A. Yurdakul, “Efficient Implementations of Multi-pumped Multi-port Register Files in FPGAs,” 16th Euromicro Conference on Digital System Design (DSD’13), September 4–6, 2013, Santander, Spain.

D. Fennibay, A. Yurdakul and A. Şen, “Introducing A Heterogeneous Simulation and Modeling Framework for Automation Systems,” IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, vol. 31, pp 1642-1655, November 2012.

G. A. Malazgirt, E. Çulha, A. Sen, İ. F. Başkaya and A. Yurdakul, "A Verifiable High Level Data Path Synthesis Framework,” 15th Euromicro Conference on Digital System Design (DSD’12), September 5–8, 2012, Izmir, Turkey.

S. Bayar and A. Yurdakul, “A Dynamically Reconfigurable Communication Architecture For Multicore Embedded Systems,” Journal of Systems Architecture, vol. 58, pp. 140-159, February 2012.

S. Bayar, M. Tükel and A. Yurdakul, “A Self-Reconfigurable Platform for General Purpose Image Processing Systems on Low-Cost Spartan-6 FPGAs,” 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoc’11), June 20-22, 2011, Montpellier, France.

A. Yurdakul, B. Kurumahmut, G Kabukcu, “Generic Model for Application-Specific Processors on Reconfigurable Fabric," in Advances in Design Methods from Modeling Languages for Embedded Systems and SoC’s, Vol. 63, August 2010.

D. Fennibay, A. Yurdakul and A. Şen, “Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems,” Proceedings of the 7th IEEE International Conference on Embedded Software and Systems (ICESS’10), June 29-July 1, 2010, Bradford, United Kingdom.

D. Fennibay, A. Yurdakul and A. Şen, “Hardware-in-the-loop for hardware/software co-design of real-time embedded systems,” DATE’10 Workshop: Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, March 8-12, 2010, Frankfurt, Germany.

R. Ghamari and A. Yurdakul, “Register File Design in Automatically Generated ASIPs,” 4th HiPEAC Workshop on Reconfigurable Computing (WRC’10), Jan 23, 2010, Pisa, Italy.

B. Kurumahmut, G. Kabukcu, R. Ghamari and A. Yurdakul, “Design Automation Model for Application-Specific Processors on Reconfigurable Fabric,” Proceedings of Forum on Specification & Design Languages (FDL’09) , Sept. 22-24, 2009, Sophia Antipolis, France.

M. Erkoç and A. Yurdakul, “Halftoning Soft Cores for Low-Cost Digital Displays,” Proceedings of 24th International SympoSİUm on Computer and Information Sciences (ISCIS’09), Sept. 14-16, 2009, Northern Cyprus.

M. Aktan, A. Yurdakul and G. Dündar, “An Algorithm for the Design of Low-Power Hardware Efficient FIR Filters,” IEEE Transactions on Circuits and Systems-I, vol. 55, no. 6, pp. 1536-1545, July 2008.

S. Bayar and A. Yurdakul, “Self-Reconfiguration on Spartan-III FPGAs with Compressed Partial Bitstreams via a Parallel Configuration Access Port (cPCAP) Core,” Proceedings of 4th conference on Ph.D. Research in Microelectronics and Electronics (PRIME’08), İstanbul, Turkey, 2008.

S. Bayar and A. Yurdakul, “Dynamic Partial Self-Reconfiguration on Spartan-III FPGAs via a Parallel Configuration Access Port (PCAP),” Proceedings of 2nd HiPEAC Workshop on Reconfigurable Computing (WRC’08), Goteborg, Sweden, 2008.

G. Kabukcu and A. Yurdakul, “Low-Cost Solution to On-Line CFA Demosaicking,” International Journal of Imaging Systems and Technology, vol. 17, no. 4, pp. 232-243, December 2007.

N. Sönmez and A. Yurdakul, "SIxD: A Configurable Application-Specific SISD/SIMD Soft-Core,” International Symposium on System-on-Chip (SoC’06), Tampere, Finland, 2006.

A. Yurdakul, “Multiplierless Implementation of 2D FIR Filters,” Integration-The VLSI Journal, Volume 38, Issue 4 , pp 597-613, April 2005.

A. Özpınar and A. Yurdakul, "Configurable Design and Implementation of the Rijndael Algorithm-AES,” 6th Euromicro Conference on Digital System Design (DSD’03), Antalya, Turkey, 2003.

A. Yurdakul and G. Dündar, “A Fast and Efficient Algorithm for the Multiplierless Realization of Linear DSP Transforms,” IEE-Proceedings-Circuits Devices, and Systems, vol 149, pp 205-211, 2002.

A. Yurdakul, “An Efficient Algorithm for the Multiplierless Realization of 2-D Linear Transforms," IEEE 10th Digital Signal Processing Workshop (DSP’02), Atlanta, USA, 2002.

J. O. Coleman and A. Yurdakul, “Fractions in the Canonical-Signed-Digit Number System,” 35th Conference on Information Sciences and Systems (CISS’01), Baltimore, Maryland, USA, 2001.

A. Yurdakul, “A Synthesis Tool for the Multiplierless Realization of FIR-Based Multirate DSP Systems,” IEEE International Symposium on Circuits and Systems (ISCAS’00), vol. 4, pp. 69-72, Geneva, Switzerland, May 28-31, 2000.

A. Yurdakul and G. Dündar, “Multiplierless Realization of Linear DSP Transforms by Using Common Two-Term Expressions,” Kluwer Journal of VLSI Signal Processing, vol. 22, pp 163-172, 1999.

A. Yurdakul and G. Dündar, “Statistical Methods for the Estimation of Quantization Effects in FIR-Based Multirate Systems,” IEEE Transactions on Signal Processing, vol. 47, pp 1749-1753, June 1999.

A. Yurdakul and G. Dündar, "A New Hybrid Algorithm for Over-the-Cells Routing,” 8th Mediterranean Electrotechnical Conference (MELECON’96), vol. 3, pp. 480-483, Bari, Italy, 1996.